Transistor and method of making the same



Aug. 2, 1960 F. B. MAYNARD EI'AL 2,947,925

TRANsTsToR AND METHOD op MAKING Tm; SAME Filed Feb. 21, 1958 .aim

l l 22 W/ l Patented .g1-sugoy 2, 1960 lice TRANSISTOR AND METHOD FMAKING THE SANIE Fred B. Maynard and Earl L; Steele, Phoenix, Ariz., as-

signors to Motorola, Inc., Chicago, Ill., a corporation of IllinoisFiled Feb. 21, 195s, ser. No. 716,666 v 20 claims. (ci. 'S17-23's) Thisinvention relates generally to semiconductor devices, and moreparticularly to transistors adapted for use in both high frequency andhigh speed switching applications in operations at moderately high powerlevels. This invention also relates to an improved method of fabricatingsuch transistors.

High frequency transistors of the so-called PNIVP type have beenprovided wherein a zone of intrinsic semiconductor material in the dieor Wafer between the base layer and the collector provides a spacecharge or barrier region created by the biasing of the collectorelectrode and leading to low collector capacitances. Such low collectorcapacitance serves to improve the performance of the transistor forhigh-frequency applications. The space charge region extends from thecollector partly across the semiconductor die of the transistor towardt-he emitter. Carriers ejected from the emitter are accelerated For bothtypes of transistors mentioned as well as for conventional PNP alloyedjunction transistors, the effective width of the base region varies withchanges in collector voltages and causes changes in various deviceparameters such as current gain. For some applications,

it is desirable to keep these parameters independent of collectorvoltage. v

f As is the case withV transistors generally, it is desired to providehigh speed switching transistors in units as diminutive and compact aspossible. Space conservap tion is often an important objective in thedesign of such devices as computers in which switching transistors areused. Desirably, such transistors must be both small and at the sametime capable of mass production with high yield of satisfactory units.

It would 4befh-ighly desirable to employ high speed switchingtransistors in medium power ranges. In such applications, a substantialamount of heat may be formed during operation.V Unless this heat iseffectively dissipated to the ambient atmosphere or elsewhere, theternperature of the unit itself may be nndesirably raised and itsoperating characteristics adversely affected. For this reason, thesemiconductor unit of the transistor should be mounted in such a wail asto provide adequate heat transfer from the junction regions.Preferably,y

'. should be accomplished without the use of complicated as they reachthe space charge region but move relatively slowly through the baselayer. For quick transit time, therefore, yit is desirable that thespace charge region approach the emitter closely without reaching it.Transistors of the PNIP type have not been entirely satisfactory inswitching applications because they are characterized by undesirablyslow recovery times when there is a low potential difference between theemitter and the collector of the unit. Such a condition exists when alow collector voltage is applied or when the transistor is insaturation. The space charge does not spread completely across theintrinsic zone and so the base region is effectively widened thusincreasing the distance through which carriers from the emitter pass byrelatively slow diffus-ion processes and so increasing storage time.This characteristic limits the range of application of such transistorsfor switching purposes, since they are slow acting when operating insaturation or at low collector voltages. v

Anothery type of transistor which has been employed for high frequencyoperation is the so-called diffused base' transistor in which alow-resistivity surfacel layer yof a given conductivity type and ofgradedimpurity concentration is formed by diffusion. This layer is usedas the base layer of the transistor. The collector region is formed ofthe substrate layer, also'of low resistivity, to which the diffusant hasnot penetrated. An emitter region is formed on the base layer byalloying. Transistors of" this type may be made with a very thin baseregion Which is desirable for high frequency operation. However, thesetransistorsy have been characterized by a low punchthrough voltage whichmeans that the space charge layer associated with the biased collectorjunction covers the entire base layerand reaches the emitter even whenrelatively low voltage is applied to the-transistor. Therefore, it hadbeen thought necessaryto provide a relatively thick base layer to obtaindesirably high Vpunch-through voltage even though a thin layer ispreferable for transistor-s intended to have good high frequencyresponse. Because of their low punch-through voltage, such transistorshave not been useful at high collector voltages which limits their usein switching applications.l

and expensive heat transfer means, -but rather by utilizing relativelysimple component parts which are easy and economical to-fabrioateV andassemble, while at the same time providing satisfactory heatdissipation.

It is an object of the present invention to provide a transistorparticularly useful both in high frequency operations and for high speedswitching applications while at the same time operating effectively atboth high and low collector voltages.

It is another object of the invention to provide a transistorcharacterized by low collector capacitance, and by small and stablecollector saturation currents, and therefore, particularly adapted tohigh frequency applications.

It is another object of the invention to provide a transistor whosestructure is such that it can Ibe economically mass-produced withuniform electrical characteristics for successive units manufactured.

It is another object of the invention to provide a transistorwith'ecient heat dissipating characteristics which is capable ofYrelatively high voltage operation at medium orrhigher power levels.

It is still another object of the invention to provide a method offabricating a semiconductor die which facilitates the making of atransistor unit having a small collector capacitance. This isaccomplished by the isolation" of -a collector region which forms asmall area diffused rectifyin-g junction with the base region of thesemi-conductor die.

A feature of the invention is the provision of a transistor having asmall, electrically isolated collector region forming a small areadiffused collector junction so that the unit i-s characterized by lowcollector capacitance, and as a result is particularly adapted/for highfrequency applications. v

Another feature of the invention is the provision of L-shapedheatdissipating vmembers for a transistor, with each such member having oneof its legs connected to a base connector strip'on'wh-ich thesemi-conductor die of the transistor is mounted'andy with the other legconnected to the top surface of a mounting base to provide an effectiveheat sink. The heat dissipating members permit satisfactory operation ofthe transistor in the medium power range by furnishing adequate heattransfer from the'junction 'regions' of the transistor.

Another feature-of*thev invention is a provision in a semiconductor dieof a rectifying collector junction between a collector region ofrelatively high and uniform resistivity and a base region whoseresistivity is graded to a lower value away from the junction. As acollector voltage is applied, the space ,chargeregion spreadspreferentially from the junction into the'high resistivity collectorregion. Even at relatively high collector voltages, this region will notextend across the graded base to the emitter to cause punch-through orto reduceeffective base width. On the other hand, if a low collectorvoltage is used the base region will still extend @only to therectifying junction and is not widened so that transit time of carriersfrom emitter .to collector is not prolonged. Thus, the transistor has aneiective base width v that is relatively independent .of the collectorvoltageand operates eiectively over a relatively wide collector voltagerange.

Still another feature of the invention is the provision of a method oftreating a diffused semiconductor body so as to form a cavity having aprojection of semiconductor material of a particular conductivitytype atits bottom and isolating the projection from other material of the sameconductivity typ'e within the body. The cavity is formed by jet-etchinga surface of the body under carefully controlled conditions to produce acavity with a convex bottom thus permitting the isolation of smallcollector region of predetermined cross-sectional area which forms asmall area collector junction with an adjacent base region. Theprovision of the small isolated collector junction in turn contributesto desirably low collector capacitance for the device.

In the accompanying drawing:

Fig. 1 is a view in cross-section showing a diffused semiconductor `diemounted on a base connector strip which is attached to upright leads ofa transistor mounting base; V

Fig. 2 is a view in cross-section of the semiconductor die illustratedin Fig. 1 at a further stage in the transistor assembly process aftersuitable junction pits have been formed, and showing metal contacts inposition for being affixed to the opposite faces of the die;

' Fig. 3 is a View in cross-section showing the semiconductor die at astill further stage of the process with metal electrical contacts aixedto it within the cavities; Y

Fig.. 4 is a view in cross-section showing the semiconductor die in theform which it has in a completed transistor;

Fig.V 5 is a perspective view of a transistor embodying thesemiconductor die illustrated in Fig. 4 with' the cover member of thetransistor broken away to more clearly illustrate the method ofmount-ing the semiconductor die unit; and Y Y Fig. 6 is a view insection taken on the line 6 6 of Fig. 5.

In accordance with the present invention the semiconductor die used inmaking a high frequency, high speed switching transistor is made up of alayer of relatively high resistivity P-type semiconductor material andlayers of lower resistivity N-type semiconductor material of gradedresistivity formed, for example, by diffusion of a donor type impurityinto the P-type substrate from both sides thereof. A small region ofP-type semiconductor material is isolated from the rest of the P-typematerial-in the die and forms a dilfused collector junction with theN-type layer. The small isolated collector area enables the resultingtransistor to have a desirably small collector capacitance. Thejuxtaposition of the high resistivity collector region and the gradedresistivity base region results in a preferential spreading of the spacecharge region into the collector so that eiective base width isrelatively independent of collector voltage. In the embodiments of theinvention employing germanium as the semiconductor material,a secondregionA of P-type semiconductor material is formed by the alloying ofindium and zinc into the N-type layer so that a ternary alloy ofgermanium, zinc and indium is formed as `an emitter region.

In forming the aforesaid semiconductor die a semiconductor body withdiffused layers on its opposite faces is treated to form junctioncavities on those faces, preferably by'a jet-etching method. Arelatively shallow emitter cavity is etched into the diffused surfacelayer on the emitter side of the body while a cavity with a ,convexbottom is formed on the collector side extending through the diffusedlayer on the collector side into the substrate. A central projection ofP-type substrate is then isolated Vfrom the main body of P-type materialby forming a groove around the projection which groove extends into theN-type layer in which the emitter cavity has been formed. Jet-etchingunder controlled conditions provides a collector cavity of such contourthat a central projection can easily be isolated and also facilitate thesubsequent zinc plating of cavity bottomsl. When employing a germaniumsemiconductor die, the emitter junction is formed by placing a smallbody of indium on the zinc coated bottom of the emitter cavity anddirecting a stream of hot inert gas into the cavity -to melt the indiumand cause localized alloying of zinc and indium with the underlyinggermanium so that a ternary alloy is formed within a predeterminedregion limited to the area directly beneath the Zinc layer.

A completed transistor unit embodying the present invention includes thesemiconductor die described attached to a conductive basestrip which inturn is secured to one or more heat dissipating members. Each member isL-shaped with one leg thereof securedv tlo the base strip and the otherto the upper surface of a mounting base which serves as an effectiveVheat sink. The L-shaped heat dissipating members permit the transistorto be operated at medium power levels because of their effectiveness intransferring heat generated at the transistor junctions to the ambientatmosphere. In referring to the accompanying drawings, it is to beunderstood that all of the ligures are illustrated on a greatly enlargedscale. For example, the overall outside diameter of the transistor unitillustrated in Fig. 6 vis about 0.25 inch with the semiconductor dieparticularly illustrated in Figs. 1-4 being only about 0.005 inch inthickness. Although these and other dimensions specitied in the courseof the ensuing specification are included herein in order that theinvention may be clearly understood in its proper context, it shouldalso be understood that these dimensions are merely illustrative of aspecific embodiment of the invention.

'Inrning now specically to the accompanying drawings, there is shown inFigs. 5 and 6` a completed trainsistor 10 in accordance with thisinvention. The transistor 10 includes a mounting base 11 which has. abody portion 12 made of suitable insulating material such as glass orceramic. Body portion 12 is held within conductive metal cover 13 whichis made of a suitable alloy such as Kovar and carries a thin gold layeron its upper surface 13a. Upright mounting leads 14, 16, 17 and 18 aresupported in the insulating body 12 and extend above the at uppersurface 13a of the mounting base. Openings are provided in surface 13ato Iaccommodate the mounting leads and are of sufcient size to preventshort circuiting between the leads and the cover 13. A base connectorstrip- 19 is soldered, welded or `otherwise suitably electrically andmechanically secured at its ends to mounting lead 16 which serves as thebase lead and to supporting leadV 18 which serves no 'electricalfunction and extends only above -thesurface of the mounting base whereasthe other leads 14, 16, 11 extend below the mounting base and are usedfor incorporating the transistor 10` into an electrical circuit.

A semiconductor die 21 is secured in ohmicfconnection to one side of thebase strip 19 which has a central aper-l is; secured as bysolderingorWelding to thefemitter mounting lead 17. Emitter lead 23 is electricallyconnected to the indium emitter button 24 which is carried on one sideof the semiconductor die 21 as will be `more fully explainedsubsequently.

A collector contact button 26 on the opposite side of die 21'isconnected tocollector lead 27which in turn is soldered to collectormounting lead 14.

A- pair of L-shaped heat dissipating members 28 and 29 and each having apairl of legs 28a, 2gb and 29a, 29b respectively, are connected inheatexchange relationto the base strip 19 adjacent its ends and to the topsurface 13a. Member 28 is welded to the base connector strip 19 with theleg 28h soldered to the surface 13a. Like- Wise, theV member 29 has itsleg 29a welded to the base strip 19 and its leg 29b solderedl to thesurface 13a. The heat dissipatng members 28' and 29'are relatively wideand thus form a relatively large area connection to the strip 19-serving to carry heat therefrom and dissipate it to the ambientatmosphere as Well asy to carry it to the metal cover 13 and thence tothe insulating body 12 which combine to form an eifective heat sink. ThemembersV 28 and 29 are made of nickel strip-0.078 inch Wide and 0.0055inch thick. The entire unit is enclosed in a cam or cover member 31which is suitably connected as by welding to the mounting base 11 alongthe shoulder 32.

The transistor is fabricated in a series of steps illustrated in Figs.1-4. Fig. 4 especially shows the unique conguration of the semiconductordie 21 which contribute to the desirable electrical properties of theunit and permit its successful use in high frequency and high speedswitching applications.

rBhe Isemiconductor die 21 as particularly shown in Figs. 1-4 comprisesa substrate layer 41 of germanium of P-type conductivity and ofrelatively high resistivity. Silicon or other semiconductor materialscan be used in place of germanium. In accordance with one embodiment ofthis invention, the specific resistivity of the layer 41 is at leastabout 10 ohm-centimeters. DiifusedV layers 42 and 43 of N-type germaniumhave been formed by the diiusion of a donor type impurity into a body ofP-type germanium. Although the layers 42 and 43 may be formed by thediffusion of any suitable donor-type impurity, in accordance with onespecific embodiment of the invention, they are formed by the vapordiffusion of antimony. However, the particular method of diffusionemployed forms no part of the present invention and any suitable methodof forming a difused PN junction including `the use of othersuitable'donor-type impurities such as arsenic or phosphorous may beemployed. The semiconductor die 21 is attached to the base connectorstrip 19 which is mad'e of a thermally and electrically conductivematerial such as the alloy Kovar coated with a thin layer of tin. Thisis done by heating the stript 19 and the semiconductor die 21 byconduction to a temperature of about 600 C. with the strip 19 inYcontact with the N-type layer 42 to cause alloying between the tin andthe germanium. The base connector strip 19 is provided with a centralaperture 20 exposing a round portion of the layer 42 about 0.04 inch indiameter.

For a clear understanding of the invention it should be realized thatvarious component parts of the transistor 10 are extremely small. Inaccordance with one specic embodiment of the invention the semiconductordie 21 is about 0.065 inch lsquare and about 0.005 inch thick havingbeen cut from a larger germanium crystal Wafer which had been subjectedto a suitable diifusion treatment. The diffused layers 42 and' 43v areabout 0.0006 inch thick. The base strip -19 is 0.078 inch wide, 0.210inch long and 0.0055 inch thick. In order to facilitate handling of anobject so small as `the base strip` 19 (and the semiconductor die 21carried thereon) during assembly of the transistor 10, the strip 19 andthe die 21 are connected to the mounting base 11 by welding the ends 6of the strip to mounting leads 16 and-18 respectively. The mounting:lead 16 serves as the base lead-in thefcompleted transistor unit'. Heatdissipating members 28. and 29V are welded to the sides of the basestrip- 19 opposite the leads- 18 and 16 respectively with the'legs 28band 2911 being soldered to the surface la'of metal cover 13. This.arrangement simplifies handling of the` semiconductor die 21 duringsubsequent etching and alloying steps. However, theinvention may bepracticed by performing the Vetching and alloying steps on` a. diethat'is attached to a temporary base strip, and is subsequentlydetached'and remounted.

After connection to the mounting base, the semiconductor die 21 istreated to form apair of roundljunction pits 44 and 46 on the oppositefaces thereof. Each of these pits has a characteristic size and contourwhich must be accurately controlled. These pitsmay be formed by suitablemechanical methods such as. Sandblasting, drilling, or ultrasoniccutting orV by etching techniques employing suitable masks. However, inlaccordance with a Ispecific embodimenty of the invention the. pits 44and 46 are formed by jet-etching. In jet-etching, a jet stream ofsuitable electrolyte is `directed onto a surface of a semiconductor die.Anelectric; currentis passed through the jetfandthroughthe die in adirection to establish anV etching action by the jetv so as to forma pitin the surface of the die. By aligning the semiconductor d'ie between aypair of opposed nozzles, pits directly opposite one another can. beformed-in the face. of the die, either separately orl by simultaneousaction of a pair of jets-each action on an. oppositev face.

In accordance with a specific embodiment of the invention, an etchingelectrolyte is employed which permits the contours of. pits etched ingermanium bodies to be controlled by the current density passing throughthe electrolyte impinged against them during the etchingA action.Thiscomposition is. made of a solution of Zinc sulphate, ammoniumacetate and ammonium chloride.- A particularly useful compositioncontainsA the ingredients in the following concentrations:

. Grams per literV Zinc sulphate (as ZnS.O4.7I-I2O) 2-5 Ammonium acetate20 Ammonium chloride 25 j position but under differentV controlledVconditions of current density, time and jet diameter. I'n order to forma round flat-bottomed emitter pit 44, a jet 0.008 inch in diameter andwith a current of 2 milliamperes passing through it is directed' againstthe N-type layer 42 through the aperture 20 for a period of 20 seconds.This results ina dat-bottomed pit 0.002 inch deep and 0.008' inch in`diameter. An advantage of forming the emitter pit 44 by jet-etching isthat the zincplayer 47 shown at the bottomV of the pit in Fig. 2 can beformed simply by reversing the direction of the current in theelectrolytic jet after the pit has been formed. As will be explained inmore detail subsequently, the z inc layer 47 serves to limit and controlthe sizeand shape of thealloyed emitter regions subsequently formed. Asatisfactory zinc layer is formedv in a plating time of 5 seconds usinga current of 0.75 milliampere through a jet of the same size andchemical composition as that employed in etching the emitter pit.

The collector pit 46 formed' on the opposite sideof the semiconductordie 21 is formed by jet-etching using the same electrolyte but withfajet of different diameter and employing a higher current density overa'longer period of time. u By employing the electrolyte compositionspecied, aV collector pitV having a convex bottom'is formed by using ajet 0.010 inch in diameter and carrying a current of 6 milliamperes anddirecting it against the collector side of the die for 200 seconds.notedfor Fig. 2 that the collector pit 46 is much deeper than theemitter pit 14 passing entirely through the N-type layer 43 and into theP-type substrate 41. A convex projection 48 is formed in the bottom ofthe pit 46 in contrast to the essentially flat-bottom of the emitter pit44. The difference in cavity contours is due to the difference incurrent density through the etching jets.

After the jet-etching ofpit 46 is completed a zincflayer 49 is platedontortherprojection 48 under the same conditions used to form the Zinclayer 47.

In accordance with one embodiment of the invention and under thecondition speciiied' above, jet-etchingof the collector pit is carriedout only to the depth indicated in Fig. 2. The etching is thus carriedonly to the point where the bottom of the pit 46 is near the diifusedjunction 52 between N-type layer 42 and P-type substrate 41. In order toform a kdiffused collector junction having an area small relative to thearea of the semiconductor die, the projection 48 of P-type germanium,which makes up the collector region, is electrically isolated from therest of the P-type germanium in the substrate 41. This isolation may beaccomplished by continuing the jet-etching step for a somewhat longertime. However, it has been found more convenient to carry out the inalisolation of the collector region 48 in a separate step which is moreeasily controlled.

Following the formation of the pits 44 and 46, ohmic contact is made tothe collector region 48 and an emitter junction electrode is formed inthe pit 44. Both of these contacts are made by melting a small body of asuitable metal such as indium (or containing indium in alloyed form)positioned at the bottom of the respective pits as shown in Fig. 3. lInthe case of the emitter electrode, a metal capable of forming arectifying junction with the germanium at the bottom of pit 44 is used.An indium ball 53 formed at the end of the indium plated nickel emitterlead wire 23 is positioned in the emitter pit 44 in contact with thezinc layer 47 In the particular embodiment described, the indium ball 53is about 0.006 inch in diameter with the emitter lead wire 23 having adiameter of 0.002 inch. It is advantageous to coat the indium ball 53with a suitable ux such as that manufactured by the Division LeadCompany of Summit, Illinois under the designation Divco No. 335. Theindium ball 53 is melted by directing against it a jet of hot,non-oxidizing gas such as nitrogen, argon or carbon dioxide at atemperature between 350 and 400 C.

When the indium ball 53 is melted by the hot jet, it begins to iiow overthe zinc layer 47. Its spread is limited to the Zinc covered area. Themolten indium alloys with the zinc and this binary alloy in turnpenetrates into the N-layer 422 to form a ternary alloy of germanium,zinc and indium which forms an emitter region of recrystallized materialof P-type conductivity indicated at 56 in Fig. 4. The area of theemitter region 56 and of the emitter junction 57 formed between it andlayer of N-type material 42 is coeXtensive in the area with the zincplated region 47. This is because the zinc controls the spreading of theindium as it is melted which is believed to be due to the preferentialwetting eifect between indium and Zinc. Because the area of the Zinclayer 47 controls the area of the alloyed emitter junction 57, thealloying method facilitates production of alloyed junctions ofreproducible size and hence reproducible electrical properties.

The portion of the melted indium which does not penetrate to therecrystallized alloyed region 56 forms the emitter button 24. Theemitter lead 23 is secured to emitter mounting lead `17 as shown inFigs. 5 and 6 by soldering or welding.

Ohmic contact to the collector region 48 is mad'e in a similar manner byplacing indiuim ball 54 attached to indium plated nickel lead wire 27against the zinc layer 49- on the surface of the collector region 488and applying Itwillbe a jet of hot inert gas to melt the indium.V Theindium ows over the zine layer 49 and is limited to that area formingthe collector contact button 26, as shownin Fig. 3. Since collectorregion 48 is of P-type'conductivity there is no rectifying junctionformed by any alloyed region produced. The zinc layer 49 is used tocontrol the spreading of the indium and to facilitate locating the ohmiccontact in the precise position desired. Since the contact formed isohmic, it `does not effect the characteristics of the diffused collectorjunction 52 in any way. Other metals beside indium which are suitablefor establishing ohmic contact with the collector region 48 may bepused.

Although a preferred embodiment of the invention involves the useY ofthe zinc layers 47 and 49, the invention may also be practiced in itsbroader aspects using other suitable methods of forming the alloyedemitter junction and the ohmic connection with the collector region.Thus, indium may be attached directly to the germaniumY or other metalsappropriate for the purpose may be used to form the alloyed emitterjunction and the ohmic connection. Also, in some embodiments of theinvention, the emitter junction may be formed by plating an electrode ofP-type metal such as Zinc or indium onto the bottom of the emitter pit44 thus establishing a rectifying junction with N-type layer 42.

The semiconductor die 21 is now in the condition shown in Fig. 3. Inorder to form a Itransistor of the desired low collector capacitancedesired in devices adapted for high frequencyy application, thecollector region 48 is isolated from the remainder of the P-typematerial making up the substrate layer 41. This isolation can be carriedout easily and conveniently because of the contour of the collector pit46 which provides the collector region 48 as an easily isolatedprojection. In accordance with a specic embodiment of this invention,isolation of the collector region 48 is accomplished by etching aAre-entrant groove indicated at 58 in Fig. 4 which extends into theN-type layer 42 and around the periphery `of the collector pit. Etchingis accomplished by immersing the semiconductor die 21 in a ten percentaqueous solution of sodium hydroxide. The re-entrant groove 58 is formedby electrolytic etching makin-g the collector region 48 the anode andusing a nickel cathode immersed in the bath. The emitter side of thesemiconductor die is masked with silicone grease to prevent its beingetched. A potential of siX volts is applied between the anode andcathode for tive second intervals with the unit being tested for reversecollector saturation current at the end of each interval. Whensufficient etching has taken place so that the re-entrant groove S8penetrates to the N-base region 42 thus isolating collector region 48, astable collector reverse saturation current of 20 microamperes or lessis obtained.

The partially assembled transistor unit is then subjected to the finalelectrical tests, vacuum dried and enclosed in the can 31. Theconfiguration of the various ccnductivity zones in the semiconductor die21 in the completed transistor is illustrated in Fig. 4.

The transistor of this invention possesses a number of highly desirableoperating characteristics. One such characteristic is its ability tooperate at much higher power levels than conventional high speedswitching transistors. Heretofore, such transistors have been limited torelatively low power range of l0 to 25 milliwatts. At higher levelsthese transistors have been damaged or destroyed by overheating as aresult of heat generated during their operation. The transistor of thisinvention, however, is consistently capable of successful operation at apower level of milliwatts and in some instances at 250 milliwatts. Thisis because ofthe superior heat dissipating properties of the transistordue to the eifective heat transfer provided by the members 28 and 29which transfer `heat generated during operation of the transistor fromthe semiconductor die 21 through the base strip-19 only 0.2" C. permilliwatt'has-been obtained at operationV of typical transistors made inaccordance' withf'this invention.

' Because of the extreme thinness vof thev base layer-:'42 coupled withthe small collector capacitance that can be obtained by providinga-.smallarea collector junctionSZ', transistors of the presentvinvention have excellent high frequency characteristics; Table I beloware some typical high frequency measurements on typical units made inaccordance with the present invention. The data. in Table l wasobtained'in using.` a collector voltage of 1.2 volts and a collectorcurrent of l' milliampere.

' Table I Beta PowerGain, db Unit f Max No. paid. .VMC/Sec.

A`1K., 0.51116 .5M., 12.5M.. v30Mo 70MY 43 1.5 4o 39 43.0 30.0 21.5' i14.0 18o a0 1.0 26 26 38:5 3110 22.51 15;0 210 95 1.8 7s 6s 31.5. 23.015.0 v205 Transistors of the presentY invention alsofhave' excellentAhigh speed switching'characteristics. This' isbelieved to be due in partto' the use offa relatively high? resistivityV collector region and arelatively low resistivity-base region: leading to independence of theelective basel Widthof theV transistor with respect to'voltage drop`across it. The resistivity of the base region is referredv to asrelativelyy low since it is lower than'. that ofA the collector region.VThe collector region 48 is formed of. germanium having a resistivity ofat least "ohmcenti`meters and preferably at least about 20ohm-centimeters. junction 52, Ythe resistivity of baseVA region 42 is'about the same as that of the collector region but', its valueV fallsotf rapidly to about 0.001. ohm-centimeters at theY outer surface of thesemiconductor. die. VThis is due to4 the graded concentration ofdonor-'type impurities inthe base region, theconcentration beinghigherremote from. the junctionV S2; SinceA the resistivity of base region-421 varies from a value no higher than. that` of collector region 4S toa much'lower value, the former is referred to as a regio-n of lowerresistivity or of relatively low resistivity.

Because of its Vgraded resistivity, thel baseregion.` 42 is providedwith anelectrcal field'v which accelerates carriers injected attheemitter on their passage' 'to' the collector. This contributes tothev effectiveness of the present invention as a high speed switching'transistor.

In the past, PNIP transistors'whichV have foundy application in highspeed switching ,have been limited. in their use since they werecharacterized by very large storage time of carriers and'byl slowrecovery time when the voltage across the device i's lowy as when it isinv or over saturation or at low collector voltages. Hole storage andrecovery times Vcontrol theispeedat which switching can be accomplishedand are desirably as short as possible.

Hole storage time refers toafigure-of-merit measurement common inevaluating' switching transistors. It is the amount of time an outputpulsefrorn a transistor drivenrinto saturation tends vto hold upl to itsswitched value after the driving pulse isfturned oit.' It is'expressedas the timev from the end.l of. the driving pulseto'y the point where`the pulse voltage lowers'to y90% of its switched value. Recovery timeis". the: time from the end of the'driving pulse until the transistoroutput. is reduced to 1.0% of itsswitched value. The undesirably hightimes for these parameters in PNIP'transistors operated at saturationare Vbelieved to be-.due't'oY effective widening of the base region`when.` thev spacercharge region does not Vextend completely vacross the`intrinsic? regioni.V

frorrrthe collector which condition occurs atV low collector voltages. Yi

However, transistors made infaccordancewith the presentinvention have aneiiectivebase Width relatively independent of the voltage drop'acrossthem and of variations in collector voltage because the space chargelayer resul-ting from the application of collector bias extends fromcollector junctionV 52 into the high resistivity collector regionratherthan into the low resistivityv base At the diffused region. The baseregion 42 can extend only as far as the collector junction 52Y (at whichpoint carriers from emitter 24 ar-e collected) and hence is independent'of the width of the space charge region unlike the base region of aPNlPtransistor. Since the base region `42 is a diffused layer it' canbe madethin and, in accordanceV with the invention, can be maintainedeffectively thin. As a result, the Vtransistors are characterized by lowstorage time of carrierstholes in the case of PNP'transistors) andquick` recovery times. Table Il below indicates the superiority oftransistors'made in accordance with the present invention overprior'switchingtransistors of the PNIP typewith respect to hole storagetimes and recovery times4 for units operated at 6A dbove'r saturationand hence with ay low voltage drop across them.

YTransistors of this invention operate successfully over al wide'rangeof collector voltages. In typical units, the common emitter'current gainis virtually independent of collector voltages at low currents forcollector voltagesl between two and twenty volts. Also, the rise timedoes not` increase iappreciably with increased driving pulse atcollector voltages in the range between 1.5 and 45 volts.

Both of. these characteristics are believed to be due, at:

least in part, to the independence of the effective base width of thetransistor with respect to collector voltages.

The present invention provides a high speed, high frequency switchingtransistor whose improved structure andmountinglin conjunctionwith a.pair of L-shaped.

heat Vdissipating members enhancesv its heat transfer characteristics.This permits lits effective operation at high powerlevelsfwi'th`ad`equate transfer ofheat away from its junctions. Conigurationof the semiconductor die, which is characterized by small Yisolatedcollector region of high resistivity separated from the base region oflower resistivity by a diiused rectifyingY junction, provides'atransistor of low collectorcapacitance.. This, combined with thinness ofthe base region, permits the resulting transistor to be usedVsuccessfully for both high speed`A switching and high frequencyapplications. The use of jet-etching techniques, particularly vin theformation of the collector pit, Venables Vthe transistor kto bemanufactured easily andv conveniently and facilitates formation of akdiffused collector junction of small and accurately controllable area.

Although thev invention has been described with respect to a PNPtransistor, it will be understood that it may also be applied to themaking of an NPN device.

' Successful operation of the transistor ofV the present invention atrelatively high collector voltages is made possibleby its highpunch-through Voltage. The juxtaposition'. of.v the high resistivitycollector region 4,8 and' the base region 42 whose resistivity decreasesrapidly in a direction away from junction 52 effects a preferentialspreading of the space charge region into the collector region withrelatively llittle spreading into the base region. The gradedresistivity of base region 42 provides progressively greater resistanceto the advance of the space charge region the closer the space chargeapproaches the emitter 24 so that high collector voltages may be appliedwithout causing punch-through. This enables the base region 42 to bemade thin to provide a transistor having good high frequency responsewithout lowering punchthrough voltage to an undesirable level.

We claim:

1. In a transistor, a semiconductor body including in combination, alayer of semiconductor material of a rst conductivity type and a layerof semiconductor material of the opposite conductivity type formed bydiffusion of a conductivity modifying impurity into the firstconductivity type material, a first region of material of the firstconductivity type in said body electrically isolated from the rest ofthe material of the'same conductivity type in said layer thereof, adiifused rectifying, junction formed between the isolated rst region ofsaid first conductivity type and said material of said oppositeconductivity type and a second region of material of said first con'ductivity type formed by alloying a conductivity moditying impurity intosaid layer of semiconductor material of said opposite conductivity typeto form an alloyed rectifying junction. Y

2. In a transistor, a semiconductor body including in combination, `allayer of P-type semiconductor material and a layer of N-typesemiconductor material formed by diffusion of a donor-type impurity intosaid P-type semi' conductor material, -a iirst region of P-typesemiconductor material in said body electrically isolated from the restof the P-type semiconductor material in said layer thereof, a diffusedcollector junction of small area as compared to the area of saidsemiconductor body, said dijused collector junction formed between saidisolated region of P-type semiconductor material and said N-typesemiconductor material and a second region of P-type semiconductormaterial formed by the alloying of an acceptortype impurity into saidlayer of N-type semiconductor material to form an alloyed emitterjunction.

3. A transistor including in combination, a semiconductor die includinga layer of P-type germanium and a layer of N-type germanium formed bydiifusion of a donor-type impurity into P-type germanium, means formingan emitter pit in said N-type layer, an emitter electrode alloyed tosaid die at the bottom of the emitter pit and forming an alloyed emitterjunction with said N-type layer, means defining a collector pit in saidP-type layer, a projection of P-.type germanium at the bottom of thecollector pit, said projection extending from said layer of N-typegermanium and being electrically isolated from the main body of P-typegermanium in said die, a diffused collector junction formed between saidprojection and said layer of N-type germanium `and means forming anohmic contact with said projection. i Y

4. A transistor for use in high frequency and high' speed switchingapplications including in combination, a semiconductor die having alayer of P-type germanium of a resistivity of at least about lohm-centimeters and a layer of N-type germanium of a lower resistivityformed by vapor diffusion of a donor-type impurity into. P-typegermanium, means forming an emitter pit in said N-type layer, anindium-containingalloy'ed emitter region formed at the bottom of theemitter cavity, means forming a collector pit in said P-type layer,means forming a lperipheral groove in the bottom of the collector pitand extending into said N-type layer, a projection of P-type' germaniumat the bottom of the collector pit constitutingV al collector region,said projection extending from said N- 12 type layer and beingelectrically isolated from the main body of P-type germanium in saiddie, a small area diffused collector junction formed between saidprojection and said N-type layer, and means forming an ohmic contactwith said projection.

5. A transistor for use in high frequency and high speed switchingapplications including in combination, a semiconductor die having alayer of P-type germanium of a resistivity of about 20 ohm-centimetersand a layer of N-type germanium adjacent said 1P-type layer formed byvapor diffusion of a donor-type impurity into P-type germanium, theresistivity of said N-type layer being graded from about 20ohm-centimeters adjacent said P-type layer to 0.001 ohm-centimetersinthe portion of said N-type layer remote from said P-type layer, saiddie having an emitter pit jet-etched in said P-type layer, anindium-containing alloyed emitter region formed in said die at thebottom of the emitter pit, said die further having a collector pitformed at least partially by jet-etching in said P-type layer oppositethe emitter pit, means forming a peripheral groove in the bottom of saidcollector pit and extending into said N-type layer, a projection ofP-type germanium at the bottom of the collector pit constituting acollector region, said projection extend from said N-type layer andbeing electrically isolated by the groove from the main body of P-typegermanium in said die, a small area diffused collector junction formedbetween said projection and said N-type layer, and means forming anohmic contact with said projection.

6. A transistor for high frequency and high speed switching applicationand adapted for operation at a power level of about milliwatts, saidtransistor including in combination, a semiconductor die having a smallarea diffused rectifying collector junction, a collector region ofrelatively high resistivity, a base region of lower resistivity and analloyed rectifying emitter junction, an elongated flat conductive basestrip with said die carried on said strip and in heat exchange relationand ohmic surface of conductive metal and a plurality of uprightmounting leads extending above said base, said strip beingsecured at itsends between two of said mounting leads, a pair of L-shaped heatdissipating members made of a heat conductive metal and each having apair of relatively wide, flat perpendicular legs with one leg of eachmember being secured along said strip adjacent one end thereof to form arelatively large area heat exchange contact therewith with the other legof said member being secured to said metal upper surface of saidmounting base toy form a relatively large area heat exchange contacttherewith so that heat generated at said rectifying junctions of saidtransistor during operation thereof is effectively transferred from saidsemiconductor die.

7. A method of making a transistor including in combination, the stepsof providing a semiconductor body having a substrate of one conductivitytype and a surface layer of the opposite conductivity type with a iirstrectifying junction formed between said substrate and said layer,forming a second rectifying junction in said layer of the oppositeconductivity type, electrically isolating a portion of the substrateadjacent said rst rectifying junction from the main body of saidsubstrate, and providing an ohmic connection with the electricallyisolated portion.

-8. A method of making a transistor including in combination the stepsof providing a semiconductor body having a high resistivity substrate ofone conductivity type and a surface layer of the opposite conductivitytype and of lower resistivity on one surface of said body with a firstrectifying junction formed between said substrate and said layer,forming a second rectifying junction on the surface layer of lowerresistivity, electrically isolating a portion of said high resistivitysubstrate adjacent said first rectifying junction from the main body ofsaid substrate and providing an ohmic connection with theelectricallypisolated portion. I y

' 9. A method `of making a transistor'inciuding tire steps of diiusing adonor-type-impurity intoY a body of'P-type semiconductor material toformA adjacent P' and 'N-type layers, forming a iirst pit in said'N-type layer-forming a second pit in said P-type layer with theperiphery of the second pit bottom extending into said N-type layer toform a projection of P-type material opposite said first pit, andforming an alloyed regionof P-type, semiconductormaterial within saidfirst pit;

10. A method of making a transistor including the steps of diffusing adonor-type impurity into a die of P-type germanium Vto formadjacent yPand N-type layers, jetetching an emitter pit in said N-layer,jet-plating a layer of zinc at the bottom ofthe emitter pit, alloying anindiumcontaining body positioned in said pit into said die to form anYalloyed region of P-type conductivity material which region formsanalloyed emitter' junction wtih said N-type layer, jet-etching acollector pit in said P-type layer, said pit having a convex bottom witha central projection of P-type germanium formed therein, forming agroove around said projection with the groove extending into saidN-layer to electrically isolate said central projection of P-typegermanium from the other P-type germanium in said die with a diffused'collector rectifying junction between said projection and said N-typelayer and providing an ohmic connection with said projection.

11. A method of making a transistor including the steps of diffusing adonor-type impurity into a die of P- type germanium to form adjacent Pand N-type layers, jet-etching an emitter pit in said N-layer,jet-plating a layer of Zinc at the bottom of said emitter pit, alloyingan indium-containing body positioned in said emitter pit to form analloyed region of P-type conductivity material which region forms analloyed emitter junction with said N-type layer, jet-etching a collectorpit in said P-type layer so that said collector pit has a convex bottomwith a central projection of P-type germanium formed therein,electrolytically etching a groove around said central projection withthe groove extending into said N-layer to electrically isolate saidcentral projection of P-type germanium from the other P-type germaniumin said die, with a diffused rectifying collector junction formedbetween said projection and said N-type layer, connecting anindium-containing body to said central projection to establish an ohmicconnection therewith, and securing a base connection n ohmic connectionalong said N-type layer.

12. A method of making a semiconductor unit for a transistor includingthe steps of providing a semiconductor body of one conductivity type,vapor diffusing a conductivity modifying impurity into saidsemiconductor body to form a ditused layer of opposite conductivity typeand a substrate layer of said one conductivity type with a firstrectifying junction therebetween, forming a second rectifying junctionin said diffused layer, and removing a selected portion of saidsubstrate layer and said first rectifying junction from saidsemiconductor body to form a projection on said diffused layer includingan active collector region and an active collector junction ofpredetermined cross-sectional area.

13. A method of making a semiconductor unit for a transistor includingthe steps of providing a semiconductor body having a first layer of oneconductivity type and a second layer of opposite conductivity type witha first rectifying junction between said layers, forming a secondrectifying junction in said rst layer, and selectively etching a portionof said second layer and said rst rectifying junction to form aprojection including an active collector region and an active collectorjunction of predetermined area.

14. A method of making a semiconductor unit for a transistor includingthe steps of providing a semiconductor body having a substrate layer ofone conductivity type and a surface layer of opposite conductivity typewith a first rectifying junction between said layers, forming a,

14 secondfrectifyingfjunction. in said surface l'ay'er, and'etching a'loop-shaped channel'throughk one of saidlayers'and said iirstrectifying; junction, thereby isolating a` projectionincluding'anractiveconductivity region and an active rectifying junctionofV predetermined area.

15. A methodof making a semiconductor unit for a transistor includingthe steps of providing a semiconductor body of one conductivity type,vapor diffusing a conductivity modifying impurity intok saidsemiconductor body to form a diffused layer of' opposite Vconductivitytype and a substratelayer of said one conductivity type with a firstrectifying junction therebetween, forming a second-rectifying junctionin said diffused'layer, an'd'etching a loop-shaped channel throughy saidsubstrate layer and said iirstl rectifying junction, thereby isolating aprojection including an active collector'region'and an active collectorjunction of'predetermined area.

16. In a transistor, a semiconductor body including in combination, afirst layer of semiconductor material of `one conductivity type, asecond layer of semiconductor material of opposite conductivity type, adiiused rectifying junction between said layers, and a rectifyingemitter junction on one of said layers, said body having a channel ofpredetermined loop-shaped configuration extending through said rst layerand said rectifying junction into said second layer to electricallyisolate a portion of the material of said first layer from the remainderof the material thereof and dene a collector junction of predeterminedarea between said layers.

17. In a transistor, a semiconductor unit including in combination, asubstrate layer of semiconductor material of one conductivity type, adiffused layer of semiconductor material of opposite conductivitytypeforming a diffused rectifying junction with said substrate layer, aregion of semiconductor material of said one conductivity type forminganother rectifying junction with said diffused layer, said layers eachhaving an outer surface and one of said layers having an endless channelextending from said outer surface thereof through the same and throughsaid `diffused rectifying junction, thereby electrically isolating anisland including an active conductivity region and an active collectorjunction of predetermined area, and a thermally conductive memberattached to the outer surface of the other of said layers andcooperating therewith to provide a heat sink.

18. In a transistor, a semiconductor unit including in combination, asubstrate layer of semiconductor material of P-type conductivity withrelatively high resistivity, a diffused layer of semiconductor materialof N-type conductivity having an outer surface and forming a rstrectifying junction with said substrate layer, said diffused layerhaving a resistivity range graded from a value adjacent said outersurface substantially lower than the resistivity of said substrate layerto a higher value adjacent said first rectifying junction, one of theaforesaid layers having an endless channel extending therethrough andthrough said irst rectifying junction to electrically isolate a portionof the semiconductor material of said one layer from the remainder ofthe material thereof, an electrode including an emitter region of P-typesemiconductor material forming a rectifying emitter junction with saiddiffused layer, and an ohmic connection to each of said layers and saidelectrode.

19. In a transistor, `a semiconductor body including in combination, adiffused layer of semiconductor material of one conductivity type havingan outer surface, said diffused layer providing a base region with agraded resistivity range, Ian electrode on a small area of said outersurface including an emitter region of semiconductor material ofopposite conductivity type forming a rectifying emitter junction withsaid diffused layer, and

an isolated layer portion projecting from said diffused .layer oppositesaid rectifying emitter junction, said layer portion having a transversecross-section of predetermined iarea smaller than the correspondingcross-section of said diused layer and including a collector region ofsemiconductor material of said opposite conductivity type, saidcollector region having a resistivity above said resistivity range ofsaid diffused layer and forming a collector junction with said diffusedlayer, and a thermally conductive member attached to said outer surfaceof said diiused layer and having a relatively large area of contacttherewith to provide effective conduction of heat away from saidcollector junction. Y

20. A transistor including in combination, a semiconi ductor unit havinga `diffused base layer, -a collector layer, and an emitter regionforming a rectifying emitter junction with said base layer, one of saidlayers including a portion isolated from the remainder thereof forming asmall area collector junction with the adjoining layer, `and the otherof said layers having a relatively large mounting area, anelongatedrflat strip of electrically and References Cited in the le ofthis patent UNITED STATES PATENTS Kircher July 15, 1952 2,810,870 Hunteret al. Oct. 22, 1957 2,811,653 Moore Oct. 29, 1957 2,830,920 Colson etal Apr. l5, 1958

